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/diy/ - Do It Yourself

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>> No.1691910 [View]
File: 1.24 MB, 3264x1836, 20191001_050427.jpg [View same] [iqdb] [saucenao] [google]
1691910

I don't think I'm getting the basics here. I'm doing a boolean logic course and this is my first engineering course. I was here asking questions a few threads ago if anyone remembers that. Anyway, I'm very confused on how flip flops aren't ALWAYS race conditions. At least when they're powered on. Once they're on and stable, they make perfect sense. But when they're first powered on and I'm tracing the circuit, I just don't get it. When you have these flip flops where one input of a gate is the output of a parallel or later gate and the other is a high from an input, you should assume the input that comes from a later gate is a low no matter what at least until the signal completes one lap of the circuit, right? I feel like I'm explaining this horribly because I'm very confused.

In this pic, I think I understand up until the set of NANDS I circled. First set of gates should output low, then the second set outputs high, right? But then once it reaches that third set, and they're connected to each other, doesn't that end up being a race? It looks like the top>bottom wire is shorter so would this end up with the bottom one having two high inputs, outputting low?

Also, how does a circuit continue if a NAND gate has two low inputs and outputs high? Isn't high and low the same as power and no power? If there's no power going to it, how can it output power? It shouldn't be able to output any signal at all, right? Or am I completely missing how this works?

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